1. Field of the Invention
The present invention relates to a patterning device holding apparatus, and more particularly, to a patterning device holding apparatus for a charged particle beam imaging.
2. Background of the Related Art
Improvements in the semiconductor manufacturing technology have allowed for designing and manufacturing of higher density Very Large Scale Integrated (VLSI) circuits and packing more transistors on a given surface area to form a semiconductor device or chip. Increasing transistor density on a given chip has led to the need for method to provide electrically related, higher resolution wafer inspection and defect review. In semiconductor device manufacturing processes, defects may be unintentionally generated during the various stages of semiconductor processing. Thus, it is important to find defects accurately and efficiently as early as possible.
Generally, a process for manufacturing semiconductor devices comprises the operations of forming layers of a variety of materials on or in the substrate of each semiconductor device; lithography, masking and printing circuit patterns on the semiconductor device; and removing or etching portions of the layers to form the semiconductor device. Such semiconductor devices are manufactured by repeating these and other operations on each device of a semiconductor wafer. Better manufacturing techniques have allowed for micro fabrication, resulting in features that are less than 0.1 micron. Examinations of the wafer are made for obtaining defect free devices.
Conventional wafer inspection and/or defect reviewing methods consist of a high magnification and high resolution imaging system, where the wafer or photomask is scanned pixel by pixel by a laser diode. Other wafer examination methods call for the use of optical microscopes. Scanning Electron Microscopes (SEM), as a more advanced microscopic approach, have been used in some defect detection and/or reviewing methods such as critical dimension measurement. With the increasing numbers of transistors packed on a chip, more efficient and more accurate wafer inspection and/or defect reviewing method is desired.
SEM may be used for the inspection and/or defect review of a workpiece having non-circle shapes, for example a parallelogram. Therefore, it is desirable to provide a method and system capable of handling such a workpiece for SEM examination.